LAHORE: A team of researchers at the Department of Electrical Engineering, University of Engineering and Technology (UET), Lahore, has designed a System on Chip (SoC) integrating a processor core with multiple peripherals for embedded applications. The designed SoC (UETRVESoC) consists of a three-stage pipelined RISC-V processor core, three motor control modules, each capable of controlling DC-servo motors for coordinated multi-axis motion control, along with few other peripherals. UETRVESoC is open-sourced and is showcased at the UET’s Department of Electrical Engineering GitHub codebank (https://github.com/ee-uet/UETRV_ESoC).

A UET spokesperson said on Sunday that UETRV_ESoC had also been selected for the fabrication in the Open Source MPW-5 Shuttle programme, sponsored by Google.

“The team, comprising Umer Shahid, Abdul Wadood, Ali Imran, Junaid Amjad, and Prof Dr Muhammad Tahir, has successfully accomplished the goal and it aspires to make many more such contributions to the open-source community in future,” he said.

UET Vice Chancellor Dr Syed Mansoor Sarwar said this success would motivate further research and development efforts in the domain of digital IC/SoC design in Pakistan.

“We have already established a laboratory for IC design and testing at the UET through funding from the Punjab government and plan on enhancing our expertise as well as offer a graduate degree programme in this area.”

Dr Sarwar said the world was facing a shortage of ICs because of their increasing demand due to proliferation of Internet of Things (IoT).

“In an era of severe shortage of IC designers, design verification experts, and fabs, we must grab the opportunity to produce graduates in this important area of engineering and technology as well as re-train graduated engineers,” the VC said.

Published in Dawn, May 30th, 2022